CVE-2026-98639

KVM: riscv: Fix NACL hfence entry update order

N/A
Published: October 18, 2026 at 03:20 PM UTC
Updated: October 19, 2026 at 10:19 AM UTC
1 product affected across 1 vendorLinux Kernel

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Severity
N/A
Exploit prediction
EPSS 0.2%

Description

In the Linux kernel, the following vulnerability has been resolved: KVM: riscv: Fix NACL hfence entry update order The SBI v3.0 specification (section 15.1.2) requires a nested HFENCE entry to be populated as follows: 1) find an unused entry with Config.Pending == 0 2) update the Page_Number and Page_Count words 3) update the Config word with Config.Pending set __kvm_riscv_nacl_hfence() writes the Config word first, so the SBI implementation (or NACL hardware) can observe a pending entry with pnum/pcount values left over from the previous use of that entry, resulting in incorrect TLB flush ranges. Write pnum and pcount first and the Config word last. Since the consumer is an external agent on coherent shared memory, use WRITE_ONCE() to stop the compiler from reordering the stores and smp_wmb() to make the parameter words globally visible before the Pending bit is set.

Affected

Our own answer: ranges merged, affected separated from platform-only, with confidence and review flags.

6.13d466c19cead5904d4d5d92adb2b213b411d3b849
Vendor states this is fixed in 6.18.55 (unaffected)
Vendor states this is fixed in 7.2.9 (unaffected)
Vendor states this is fixed in 7.3 (unaffected)

Remediation

No guide yet

No remediation guidance has been written for this CVE yet, and no fixed version or vendor advisory is recorded against it.

Quick Info

StatusRECEIVED

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