CVE-2024-30212

Microchip Harmony 3 Core library allows read and write access to RAM via a SCSI READ or WRITE command

HIGH
7
CVSS Score
Published: May 28, 2024 at 04:07 PM UTC
Updated: June 17, 2026 at 07:26 AM UTC
1 product affected across 1 vendorMplab Harmony

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Severity
HIGH7
Exploit prediction
EPSS 0.6%
SSVC
PoC

Description

If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1, the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed. The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to return data from any other offset including Progam and Boot Flash.

Affected

Our own answer: ranges merged, affected separated from platform-only, with confidence and review flags.

3.0.0 ≤ v < 3.13.43.0.0
Affected range stops below 3.13.4, so it looks safe — our inference, not a vendor statement

Remediation

No guide yet

No remediation guidance has been written for this CVE yet. What the record does show:

References (3)

Source: dc3f6da9-85b5-4a73-84a2-2ec90b40fca5
https://github.com/Fehr-GmbH/blackleak
Release Notes
Source: dc3f6da9-85b5-4a73-84a2-2ec90b40fca5
https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md

SSVC — Action Prioritization

SSVCPoCNot automatablePartial impact

SSVC signals action urgency (what to patch first), separate from CVSS which measures severity.

CVSS

7HIGHMicrochip
Vector?

Quick Info

StatusDEFERRED
CWE
CWE-190

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