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OpenSSL 0.9.8i on the Gaisler Research LEON3 SoC on the Xilinx Virtex-II Pro FPGA uses a Fixed Width Exponentiation (FWE) algorithm for certain signature calculations, and does not verify the signature before providing it to a caller, which makes it easier for physically proximate attackers to determine the private key via a modified supply voltage for the microprocessor, related to a "fault-based attack."
Our own answer: ranges merged, affected separated from platform-only, with confidence and review flags.
The affected product only carries this flaw when running on these platforms. The platforms themselves are not vulnerable.
No remediation guidance has been written for this CVE yet, and no fixed version or vendor advisory is recorded against it.
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